VLSI Research Inc.

Sunit Rikhi, a Vice President in Intel’s TMG and director of advanced design, recaps the DFM milestones Intel met in 2007. This includes achieving 1/10th the leakage in 45nm SRAM compared to 65nm and reaching design stability in 32nm a full quarter ahead of schedule with 291 Mbit SRAM array and advanced analog circuits. He outlines the challenges and methodologies for successful DFM at the extreme edge of today’s design envelope. He talks about the importance of front-loading the DFM process, synchronization, and the importance of setting early design robustness targets. You may also want to view the previous interview with Sunit from 2006 to recap how Intel’s DFM enabled their 65nm ramp.

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